{
  "title": "Open Verilog flow for Silego GreenPak4 programmable logic devices",
  "byline": null,
  "dir": "ltr",
  "excerpt": "I've written a couple of posts in the past few months but they were all for the blog at work  so I figured I'm long overdue for one on Silic...",
  "siteName": null,
  "publishedTime": null,
  "readerable": true
}
